Upset by MPU exceptions in the field? T1.accessPredictor allows you to check for any memory access violations before even flashing the software. It will perform a
static analysis by disassembling the binary, building up the call-tree and identifying r/w memory accesses for each function. No source code required!
Synchronized traces from 6 cores!
T1 makes it happen. Click
, to view a screenshot of T1 with 6 synchronized traces and some cross-core communications.
More details on the AURIX 2G can be found in Infineon's official press-release
The AURIX based ATdemo
comes with a multi-core OS, a demo application and built-in T1 timing analysis. It was never easier to get started with multi-core.